SCARP Processor Simulator
References
-
Andrew S. Tanenbaum. 1999. Structured Computer Organization, 4th ed.
Prentice Hall. [Chapter 1 (discusses SPARC, Pentium, and Java Virtual Machine
architectures)]
-
Richard Paul. 1999. SPARC Architecture, Assembly Language Programming,
and C, 2nd ed. Prentice Hall. [Chapter 1 (text for CSE240)]
Introduction
To learn the basics of assembly language programming without suffering
from the complexity of using the real tools, we use a web-based processor
simulator for a hypothetical computer architecture called SCARP. The SCARP
architecture is an extremely-simplified version of the load/store machine.
It supports only a dozen of instructions. Instruction names are somewhat
similar to those of SPARC architecture. The simulator contains a complete
environment of writing assembly codes, assembling them, and executing machine
codes.
SCARP Architecture, Memory, and Input/Output
The SCARP CPU is a 32-bit load/store architecture that consists of the
instruction set described in the last section. The CPU contains program
counter (PC), zero (Z) and negative (N) condition code (flags), instruction
register, operand registers, and 8 general-purpose registers. The program
counter (PC) is set to 0 at start. The 8 registers are called register
0, ..., and register 7. For special instructions ta,
register 1 must be used to store the option. The memory contains 256 32-bit
cells addressed from 0 to 255. The CPU supports primitive I/O functions.
I/O address is memory location 255 (the last memory cell).
Simulator Operation
Instruction help area
A simplified help information is given. For the detail about the instruction
set, see the last section of this document, SCARP Instruction Set.
Assembly code area
This area is to write an assembly code. Currently, a sample code is automatically
loaded at start. You can try this code, edit it, or write your own code.
To save your code, you need to copy the content to a file (on a Windows
machine, use ctrl-c). For more details,
see the next section SCARP Assembly Language.
Machine code area
You can directly write a machine code (numbers) or you can have the simulator
assemble the assembly code in the assembly code area. When an assembly
code is assembled into a machine code, the lines in both areas should in
most cases corresponds. Note that the machine code in this area is not
loaded to the memory until you explicitly do so by using the load program
button.
Display field
This field displays an integer when a special instruction is executed.
Keyboard field
This field accept an integer when a special instruction is executed. The
simulator message field will show when to fill in this field.
Enter button
Use this button after entering an integer in the keyboard field.
Register field
These fields shows the current value contained in each register.
PC field
PC stands for ‘program counter’. The value indicates the memory address
from where the next instruction will be read.
Z field
This field represents the status of the condition code (flag) Z, which
indicates whether the result of subcc
instruction is zero.
N field
This field represents the status of the condition code (flag) N, which
indicates whether the result of subcc
instruction is negative.
Stop field
This field indicates whether or the process must stop. If the value is
true, no execution will be performed.
IR field
IR stands for ‘instruction register’. The value indicates the op code of
the instruction currently being executed.
Op field
These fields shows the content of operands of the current instruction.
Assemble button
Assembles the code in the assembly code area and write the generated
code in the machine code area. Existing code in the machine code
area will be replaced.
Load program button
Loads the machine code into the memory starting from the address 0.
Reset button
Resets the CPU. In particular, PC is reset to 0 so that the program can
be executed from the beginning.
Step button
Executes one instruction.
Run button
Executes the program until it stops. To avoid infinite loop, the execution
will stop when more than 1000 steps are performed.
Memory read button
Reads the memory content specified by the address field. The result
is displayed in the value field.
Memory write button
Writes an integer value specified in the value field to the memory
location specified in the address field.
Address field
Memory address for reading/writing.
Value field
The result of memory read or the value to store for memory write.
Simulator message field
Displays simulator messages including when to fill the keyboard
field.
SCARP Assembly Code
Instruction
You can write one instruction (including operands when needed) on a single
line. Labels for branching can be written with or without an instruction.
Characters after the comment symbol ‘!’
will be ignored.
The syntax is as follows: [Label:]
[OpCode [Operands]] [!...]
The assembler is a simplistic implementation and does not have a comprehensive
error detection mechanism.
Sample code
! Compute factorial (for input > 1)
set 3 1 ! for keyboard input
ta 0 ! trap to activate input
! input now in address 255
ld 255 2 ! copy it to R2 (counter)
set -1 3 ! decrement val in R3
set 1 4 ! last count val in R4
mov 2 5 ! result in R5
loop:
subcc 2 4 6 ! set Z flag by R2-R4
be end ! if Z set (ie, R2==1)
add 2 3 2 ! add decrement
mul 5 2 5 ! store result * (counter-1)
ba loop ! goto loop
end:
st 5 255 ! result to I/O address
set 4 1 ! prepare for display
ta 0 ! activate display
set 0 1 ! set exit condition
ta 0 ! activate exit
SCARP Architecture Instruction Set
noop
Code: 1
Operands: none
Description: Performs no operation
add
Code: 10
Operands: <register id 1> <register
id 2> <register id 3>
Description: Adds the value of the register
specified by <register id 1> and that of the register specified
by <register id 2> and load the result in the register specified
by <register id 3>. Any combination of register ids can be used.
For example, add 1 1 1 instruct
the processor to add the value of register 1 and the same value, and store
the result again in register 1.
subcc
Code: 21
Operands: <register id 1> <register
id 2> <register id 3>
Description: Performs [the value of <register
id 1>] - [the value of <register id 2>] and load the result
in <register id 3>. Note that the condition code (flag) Z is
set true/false depending on whether or not the result is zero, and the
condition code N is set true/false depending on whether or not the result
is negative. This instruction must be used before conditional instructions
such as be.
mul
Code: 39
Operands: <register id 1> <register
id 2> <register id 3>
Description: Performs a multiplication of
the value of <register id 1> and the value of <register
id 2> and load the result in <register id 3>.
ld
Code: 70
Operands: <memory address> <register
id>
Description: Reads the value at <memory
address> and load it in <register id>.
st
Code: 71
Operands: <register id> <memory
address>
Description: Stores the value of <register
id> in <memory address>.
mov
Code: 78
Operands: <register id 1> <register
id 2>
Description: Copies the value
of <register id 1> to <register id 2>. Note that the
value of <register id 1> stays (so it's not really a ‘move’).
set
Code: 79
Operands: <integer value> <register
id>
Description: Sets the specified <integer
value> in <register id>.
ba
Code: 80
Operands: <label>
Description: Jumps to <label>
be
Code: 81
Operands: <label>
Description: Jumps to <label> if
the condition code Z is set true. Otherwise, execute the next instruction.
Note that you must use subcc to
set the condition code.
bne
Code: 82
Operands: <label>
Description: Jumps to <label> if
the condition code Z is set false. Otherwise, execute the next instruction.
Note that you must use subcc to
set the condition code.
bl
Code: 83
Operands: <label>
Description: Jumps to <label> if
the condition code N is set true. Otherwise, execute the next instruction.
Note that you must use subcc to
set the condition code.
bge
Code: 84
Operands: <label>
Description: Jumps to <label> if
the condition code N is set false. Otherwise, execute the next instruction.
Note that you must use subcc to
set the condition code.
ta
Code: 90
Operands: 0 (always integer 0)
Description: Performs the following special
operations.
| The value of register 1 |
Operation |
| 1 |
Stops execution |
| 3 |
Read from the keyboard |
| 4 |
Write to the display |
<End>